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authorBoris Brezillon <boris.brezillon@free-electrons.com>2016-11-22 12:45:28 -0800
committerStephen Boyd <sboyd@codeaurora.org>2016-11-23 11:32:22 -0800
commitf2a46926aba1f0c33944901d2420a6a887455ddc (patch)
tree9d33e37f0b24f3b0316758e9a2a07dcd3d9f119d
parentc260524aba53b57f72b5446ed553080df30b4d09 (diff)
clk: bcm2835: Fix ->fixed_divider of pllh_aux
There is no fixed divider on pllh_aux. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r--drivers/clk/bcm/clk-bcm2835.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 8c7763f..836d075 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1596,7 +1596,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.a2w_reg = A2W_PLLH_AUX,
.load_mask = CM_PLLH_LOADAUX,
.hold_mask = 0,
- .fixed_divider = 10),
+ .fixed_divider = 1),
[BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
.name = "pllh_pix",
.source_pll = "pllh",