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authorMaxime Ripard <maxime.ripard@free-electrons.com>2016-09-19 21:53:08 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-09-22 10:13:22 +0300
commitf0188ef8301ccbb128bbfd10751a9aeca8c9172e (patch)
treeb3730dc09934535060c25607e2c7694ec0e71afc
parente4192089fe5320537fd88aa29721277efef64af4 (diff)
drm/sun4i: Fix the high buffer address mask
The highest 3bits of the 4 layers buffers are all part of the same register. However, our mask computation was wrong, leading to all the lowest register bits being removed when we use regmap_update_bits, which will lead to the buffers being set to some random part of the RAM. Fix our mask. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--drivers/gpu/drm/sun4i/sun4i_backend.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.h b/drivers/gpu/drm/sun4i/sun4i_backend.h
index e007186..83e63cc 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.h
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.h
@@ -52,8 +52,8 @@
#define SUN4I_BACKEND_LAYFB_L32ADD_REG(l) (0x850 + (0x4 * (l)))
#define SUN4I_BACKEND_LAYFB_H4ADD_REG 0x860
-#define SUN4I_BACKEND_LAYFB_H4ADD_MSK(l) GENMASK(3 + ((l) * 8), 0)
-#define SUN4I_BACKEND_LAYFB_H4ADD(l, val) ((val) << ((l) * 8))
+#define SUN4I_BACKEND_LAYFB_H4ADD_MSK(l) GENMASK(3 + ((l) * 8), (l) * 8)
+#define SUN4I_BACKEND_LAYFB_H4ADD(l, val) ((val) << ((l) * 8))
#define SUN4I_BACKEND_REGBUFFCTL_REG 0x870
#define SUN4I_BACKEND_REGBUFFCTL_AUTOLOAD_DIS BIT(1)