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authorGregory CLEMENT <gregory.clement@free-electrons.com>2016-11-06 22:52:39 +0100
committerGregory CLEMENT <gregory.clement@free-electrons.com>2016-11-19 09:16:28 +0100
commit1a9cd8f36d0617630b4f0ae2601fe5600edff109 (patch)
tree3468bb71798085df5b330be0df796218e27d29c7
parent95430414c7edaa434bb7840a2ab1a1ef640a943c (diff)
ARM: dts: armada-xp-matrix: Fix the location of the pcie-controller node
In the dts for the Marvell Armada XP Matrix board the pcie-controller was located under the internal-regs node whereas it belongs to the soc node. It means that, until this fix, the pcie could not work for this board because it didn't match the definition of the pcie-controller node in the dtsi file. If we had a look on the decompiled dtb file we saw two different instances of the pcie-controller node: one with the all the resource set but disabled and the other without any resource but enabled. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-rw-r--r--arch/arm/boot/dts/armada-xp-matrix.dts18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/armada-xp-matrix.dts b/arch/arm/boot/dts/armada-xp-matrix.dts
index 6522b04..e1509f4 100644
--- a/arch/arm/boot/dts/armada-xp-matrix.dts
+++ b/arch/arm/boot/dts/armada-xp-matrix.dts
@@ -71,6 +71,15 @@
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
+ pcie-controller {
+ status = "okay";
+
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+ };
+
internal-regs {
serial@12000 {
status = "okay";
@@ -99,15 +108,6 @@
};
};
- pcie-controller {
- status = "okay";
-
- pcie@1,0 {
- /* Port 0, Lane 0 */
- status = "okay";
- };
- };
-
usb@50000 {
status = "okay";
};