diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2021-01-25 19:06:45 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2021-03-20 17:02:16 +0100 |
| commit | 09d4fafeb5efb4b5464774682645b93a6eb18293 (patch) | |
| tree | 0799758ceea88b0379ce7599e3d520416a0f023d | |
| parent | 3b0acc0ac3c7dc0ecb99215c7eb87a41a4acd79f (diff) | |
| download | playground-09d4fafeb5efb4b5464774682645b93a6eb18293.tar.gz | |
pci: move PCI_PROBE_ONLY flag into host_bridge
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
31 files changed, 96 insertions, 89 deletions
diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h index cf6bc1e64d66a..0f0f6165afaa3 100644 --- a/arch/alpha/include/asm/pci.h +++ b/arch/alpha/include/asm/pci.h @@ -44,6 +44,8 @@ struct pci_controller { struct pci_iommu_arena *sg_isa; void *sysdata; + + bool probe_only; }; /* Override the logic in pci_scan_bus for skipping already-configured diff --git a/arch/alpha/kernel/core_marvel.c b/arch/alpha/kernel/core_marvel.c index 4485b77f86588..342ec95709790 100644 --- a/arch/alpha/kernel/core_marvel.c +++ b/arch/alpha/kernel/core_marvel.c @@ -212,6 +212,9 @@ io7_init_hose(struct io7 *io7, int port) int i; hose->index = hose_index++; /* arbitrary */ + + /* Indicate that we trust the console to configure things properly */ + hose->probe_only = true; /* * We don't have an isa or legacy hose, but glibc expects to be diff --git a/arch/alpha/kernel/core_titan.c b/arch/alpha/kernel/core_titan.c index 77f5d68ed04bf..f3277b5228f48 100644 --- a/arch/alpha/kernel/core_titan.c +++ b/arch/alpha/kernel/core_titan.c @@ -254,6 +254,9 @@ titan_init_one_pachip_port(titan_pachip_port *port, int index) hose->io_space = alloc_resource(); hose->mem_space = alloc_resource(); + /* Indicate that we trust the console to configure things properly */ + hose->probe_only = true; + /* * This is for userland consumption. The 40-bit PIO bias that we * use in the kernel through KSEG doesn't work in the page table diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c index 64fbfb0763b29..d5233d6d97345 100644 --- a/arch/alpha/kernel/pci.c +++ b/arch/alpha/kernel/pci.c @@ -46,7 +46,7 @@ const char *const pci_mem_names[] = { const char pci_hae0_name[] = "HAE0"; /* - * If PCI_PROBE_ONLY in pci_flags is set, we don't change any PCI resource + * If bridge->probe_only is set, we don't change any PCI resource * assignments. */ @@ -210,9 +210,10 @@ static struct pdev_srm_saved_conf *srm_saved_configs; static void pdev_save_srm_config(struct pci_dev *dev) { struct pdev_srm_saved_conf *tmp; + struct pci_host_bridge *bridge = pci_find_host_bridge(dev->bus); static int printed = 0; - if (!alpha_using_srm || pci_has_flag(PCI_PROBE_ONLY)) + if (!alpha_using_srm || bridge->probe_only) return; if (!printed) { @@ -238,10 +239,6 @@ pci_restore_srm_config(void) { struct pdev_srm_saved_conf *tmp; - /* No need to restore if probed only. */ - if (pci_has_flag(PCI_PROBE_ONLY)) - return; - /* Restore SRM config. */ for (tmp = srm_saved_configs; tmp; tmp = tmp->next) { pci_restore_state(tmp->dev); @@ -254,8 +251,9 @@ pci_restore_srm_config(void) void pcibios_fixup_bus(struct pci_bus *bus) { struct pci_dev *dev = bus->self; + struct pci_host_bridge = pci_find_host_bridge(bus); - if (pci_has_flag(PCI_PROBE_ONLY) && dev && + if (bridge->probe_only && dev && (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { pci_read_bridge_bases(bus); } @@ -284,6 +282,7 @@ pcibios_set_master(struct pci_dev *dev) void __init pcibios_claim_one_bus(struct pci_bus *b) { + struct pci_host_bridge *bridge = pci_find_host_bridge(b); struct pci_dev *dev; struct pci_bus *child_bus; @@ -295,7 +294,7 @@ pcibios_claim_one_bus(struct pci_bus *b) if (r->parent || !r->start || !r->flags) continue; - if (pci_has_flag(PCI_PROBE_ONLY) || + if (bridge->probe_only || (r->flags & IORESOURCE_PCI_FIXED)) { if (pci_claim_resource(dev, i) == 0) continue; @@ -359,6 +358,7 @@ common_init_pci(void) bridge->ops = alpha_mv.pci_ops; bridge->swizzle_irq = alpha_mv.pci_swizzle; bridge->map_irq = alpha_mv.pci_map_irq; + bridge->probe_only = hose->probe_only; ret = pci_scan_root_bus_bridge(bridge); if (ret) { diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c index 83d6c53d6d4d1..baaeb5c9c0ab6 100644 --- a/arch/alpha/kernel/sys_marvel.c +++ b/arch/alpha/kernel/sys_marvel.c @@ -383,8 +383,6 @@ marvel_init_pci(void) marvel_register_error_handlers(); - /* Indicate that we trust the console to configure things properly */ - pci_set_flags(PCI_PROBE_ONLY); common_init_pci(); locate_and_init_vga(NULL); diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c index b1f3b4fcf99b2..7630ed7d2ade1 100644 --- a/arch/alpha/kernel/sys_titan.c +++ b/arch/alpha/kernel/sys_titan.c @@ -330,8 +330,6 @@ titan_init_pci(void) */ titan_late_init(); - /* Indicate that we trust the console to configure things properly */ - pci_set_flags(PCI_PROBE_ONLY); common_init_pci(); SMC669_Init(0); locate_and_init_vga(NULL); diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index d13ba2ac91567..6357d5f3ebace 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -423,7 +423,7 @@ int pci_common_init_dev(struct device *parent, struct hw_pci *hw) * ioport_resource trees in either pci_bus_claim_resources() * or pci_bus_assign_resources(). */ - if (pci_has_flag(PCI_PROBE_ONLY)) { + if (bridge->probe_only) { pci_bus_claim_resources(bridge->bus); } else { struct pci_bus *child; diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h index 6f48649201c57..6a8d85a69cbbf 100644 --- a/arch/mips/include/asm/pci.h +++ b/arch/mips/include/asm/pci.h @@ -51,6 +51,8 @@ struct pci_controller { of the PCI controller */ int (*get_busno)(void); void (*set_busno)(int busno); + + bool probe_only; /* trust firmware to allocate resources */ }; /* diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c index db0d4d22d46f5..5200163120888 100644 --- a/arch/mips/pci/pci-bcm1480.c +++ b/arch/mips/pci/pci-bcm1480.c @@ -178,11 +178,12 @@ static struct resource bcm1480_io_resource = { .flags = IORESOURCE_IO, }; -struct pci_controller bcm1480_controller = { +struct pci_controller bycm1480_controller = { .pci_ops = &bcm1480_pci_ops, .mem_resource = &bcm1480_mem_resource, .io_resource = &bcm1480_io_resource, .io_offset = A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, + .probe_only = true; /* CFE will assign PCI resources */ }; @@ -191,9 +192,6 @@ static int __init bcm1480_pcibios_init(void) uint32_t cmdreg; uint64_t reg; - /* CFE will assign PCI resources */ - pci_set_flags(PCI_PROBE_ONLY); - /* Avoid ISA compat ranges. */ PCIBIOS_MIN_IO = 0x00008000UL; PCIBIOS_MIN_MEM = 0x01000000UL; diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c index 1ca42f4821302..9a08db789fdbc 100644 --- a/arch/mips/pci/pci-lantiq.c +++ b/arch/mips/pci/pci-lantiq.c @@ -208,8 +208,6 @@ static int ltq_pci_probe(struct platform_device *pdev) { struct resource *res_cfg, *res_bridge; - pci_clear_flags(PCI_PROBE_ONLY); - res_bridge = platform_get_resource(pdev, IORESOURCE_MEM, 1); ltq_pci_membase = devm_ioremap_resource(&pdev->dev, res_bridge); if (IS_ERR(ltq_pci_membase)) diff --git a/arch/mips/pci/pci-legacy.c b/arch/mips/pci/pci-legacy.c index 39052de915f34..ae116cd49907f 100644 --- a/arch/mips/pci/pci-legacy.c +++ b/arch/mips/pci/pci-legacy.c @@ -18,7 +18,7 @@ #include <asm/cpu-info.h> /* - * If PCI_PROBE_ONLY in pci_flags is set, we don't change any PCI resource + * If bridge->probe_only is set, we don't change any PCI resource * assignments. */ @@ -82,7 +82,8 @@ static void pcibios_scanbus(struct pci_controller *hose) if (!bridge) return; - if (hose->get_busno && pci_has_flag(PCI_PROBE_ONLY)) + bridge->probe_only = hose->probe_only; + if (hose->get_busno && bridge->probe_only) next_busno = (*hose->get_busno)(); pci_add_resource_offset(&resources, @@ -121,7 +122,7 @@ static void pcibios_scanbus(struct pci_controller *hose) * ioport_resource trees in either pci_bus_claim_resources() * or pci_bus_assign_resources(). */ - if (pci_has_flag(PCI_PROBE_ONLY)) { + if (bridge->probe_only) { pci_bus_claim_resources(bus); } else { struct pci_bus *child; @@ -293,8 +294,9 @@ int pcibios_enable_device(struct pci_dev *dev, int mask) void pcibios_fixup_bus(struct pci_bus *bus) { struct pci_dev *dev = bus->self; + struct pci_host_bridge->bridge = pci_find_host_bridge(bus); - if (pci_has_flag(PCI_PROBE_ONLY) && dev && + if (bridge->probe_only && dev && (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { pci_read_bridge_bases(bus); } diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c index c3f82b2804848..13e4dce590a80 100644 --- a/arch/mips/pci/pci-sb1250.c +++ b/arch/mips/pci/pci-sb1250.c @@ -191,6 +191,7 @@ struct pci_controller sb1250_controller = { .pci_ops = &sb1250_pci_ops, .mem_resource = &sb1250_mem_resource, .io_resource = &sb1250_io_resource, + .probe_only = true; /* CFE will assign PCI resources */ }; static int __init sb1250_pcibios_init(void) @@ -199,9 +200,6 @@ static int __init sb1250_pcibios_init(void) uint32_t cmdreg; uint64_t reg; - /* CFE will assign PCI resources */ - pci_set_flags(PCI_PROBE_ONLY); - /* Avoid ISA compat ranges. */ PCIBIOS_MIN_IO = 0x00008000UL; PCIBIOS_MIN_MEM = 0x01000000UL; diff --git a/arch/mips/pci/pci-xlp.c b/arch/mips/pci/pci-xlp.c index 9eff9137f78e5..f76c1b3d2e53b 100644 --- a/arch/mips/pci/pci-xlp.c +++ b/arch/mips/pci/pci-xlp.c @@ -174,6 +174,7 @@ struct pci_controller nlm_pci_controller = { .mem_offset = 0x00000000UL, .io_resource = &nlm_pci_io_resource, .io_offset = 0x00000000UL, + .probe_only = true; /* Firmware assigns PCI resources */ }; struct pci_dev *xlp_get_pcie_link(const struct pci_dev *dev) @@ -292,8 +293,6 @@ static int __init pcibios_init(void) int link, n; u32 reg; - /* Firmware assigns PCI resources */ - pci_set_flags(PCI_PROBE_ONLY); pci_config_base = ioremap(XLP_DEFAULT_PCI_ECFG_BASE, 64 << 20); /* Extend IO port for memory mapped io */ diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c index 2a1c81a129ba3..4b959de4349d8 100644 --- a/arch/mips/pci/pci-xlr.c +++ b/arch/mips/pci/pci-xlr.c @@ -156,6 +156,7 @@ struct pci_controller nlm_pci_controller = { .mem_offset = 0x00000000UL, .io_resource = &nlm_pci_io_resource, .io_offset = 0x00000000UL, + .probe_only = true; }; /* @@ -332,7 +333,6 @@ static int __init pcibios_init(void) int link, irq; /* PSB assigns PCI resources */ - pci_set_flags(PCI_PROBE_ONLY); pci_config_base = ioremap(DEFAULT_PCI_CONFIG_BASE, 16 << 20); /* Extend IO port for memory mapped io */ diff --git a/arch/mips/pci/pci-xtalk-bridge.c b/arch/mips/pci/pci-xtalk-bridge.c index 50f7d42cca5a7..53d0bf16adbbf 100644 --- a/arch/mips/pci/pci-xtalk-bridge.c +++ b/arch/mips/pci/pci-xtalk-bridge.c @@ -632,8 +632,6 @@ static int bridge_probe(struct platform_device *pdev) return -ENOMEM; } - pci_set_flags(PCI_PROBE_ONLY); - host = devm_pci_alloc_host_bridge(dev, sizeof(*bc)); if (!host) { err = -ENOMEM; @@ -641,6 +639,7 @@ static int bridge_probe(struct platform_device *pdev) } bc = pci_host_bridge_priv(host); + host->probe_only = true; bc->busn.name = "Bridge PCI busn"; bc->busn.start = 0; diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h index 85775a84259c5..9ba443609729e 100644 --- a/arch/powerpc/include/asm/pci.h +++ b/arch/powerpc/include/asm/pci.h @@ -89,7 +89,7 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus, extern void pcibios_claim_one_bus(struct pci_bus *b); -extern void pcibios_finish_adding_to_bus(struct pci_bus *bus); +extern void pcibios_finish_adding_to_bus(struct pci_host_bridge *bridge); extern void pcibios_resource_survey(void); diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 2a75d056d693f..ec5ee1255ecf1 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c @@ -906,6 +906,7 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) static void pcibios_fixup_resources(struct pci_dev *dev) { struct pci_controller *hose = pci_bus_to_host(dev->bus); + struct pci_host_bridge *bridge = hose->bridge; int i; if (!hose) { @@ -925,12 +926,12 @@ static void pcibios_fixup_resources(struct pci_dev *dev) /* If we're going to re-assign everything, we mark all resources * as unset (and 0-base them). In addition, we mark BARs starting - * at 0 as unset as well, except if PCI_PROBE_ONLY is also set + * at 0 as unset as well, except if ->probe_only is also set * since in that case, we don't want to re-assign anything */ pcibios_resource_to_bus(dev->bus, ®, res); if (pci_has_flag(PCI_REASSIGN_ALL_RSRC) || - (reg.start == 0 && !pci_has_flag(PCI_PROBE_ONLY))) { + (reg.start == 0 && !bridge->probe_only)) { /* Only print message if not re-assigning */ if (!pci_has_flag(PCI_REASSIGN_ALL_RSRC)) pr_debug("PCI:%s Resource %d %pR is unassigned\n", @@ -959,14 +960,15 @@ static int pcibios_uninitialized_bridge_resource(struct pci_bus *bus, struct resource *res) { struct pci_controller *hose = pci_bus_to_host(bus); + struct pci_host_bridge *bridge = hose->bridge; struct pci_dev *dev = bus->self; resource_size_t offset; struct pci_bus_region region; u16 command; int i; - /* We don't do anything if PCI_PROBE_ONLY is set */ - if (pci_has_flag(PCI_PROBE_ONLY)) + /* We don't do anything if bridge->probe_only is set */ + if (bridge->probe_only) return 0; /* Job is a bit different between memory and IO */ @@ -1435,6 +1437,7 @@ static void __init pcibios_reserve_legacy_regions(struct pci_bus *bus) void __init pcibios_resource_survey(void) { struct pci_bus *b; + struct pci_host_bridge *bridge; /* Allocate and assign resources */ list_for_each_entry(b, &pci_root_buses, node) @@ -1448,17 +1451,17 @@ void __init pcibios_resource_survey(void) * the low IO area and the VGA memory area if they intersect the * bus available resources to avoid allocating things on top of them */ - if (!pci_has_flag(PCI_PROBE_ONLY)) { - list_for_each_entry(b, &pci_root_buses, node) - pcibios_reserve_legacy_regions(b); - } - - /* Now, if the platform didn't decide to blindly trust the firmware, - * we proceed to assigning things that were left unassigned - */ - if (!pci_has_flag(PCI_PROBE_ONLY)) { - pr_debug("PCI: Assigning unassigned resources...\n"); - pci_assign_unassigned_resources(); + list_for_each_entry(b, &pci_root_buses, node) { + bridge = pci_find_host_bridge(b); + if (!bridge->probe_only) { + pcibios_reserve_legacy_regions(bridge->bus); + /* Now, if the platform didn't decide to blindly + * trust the firmware, we proceed to assigning + * things that were left unassigned + */ + pr_debug("PCI: Assigning unassigned resources...\n"); + pci_assign_unassigned_root_bus_resources(bridge->bus); + } } } @@ -1503,23 +1506,23 @@ EXPORT_SYMBOL_GPL(pcibios_claim_one_bus); * added to a bus, this include calling it for a PHB that is just * being added */ -void pcibios_finish_adding_to_bus(struct pci_bus *bus) +void pcibios_finish_adding_to_bus(struct pci_host_bridge *bridge) { pr_debug("PCI: Finishing adding to hotplug bus %04x:%02x\n", - pci_domain_nr(bus), bus->number); + pci_domain_nr(bridge->bus), bridge->busnr); /* Allocate bus and devices resources */ - pcibios_allocate_bus_resources(bus); - pcibios_claim_one_bus(bus); - if (!pci_has_flag(PCI_PROBE_ONLY)) { - if (bus->self) - pci_assign_unassigned_bridge_resources(bus->self); + pcibios_allocate_bus_resources(bridge->bus); + pcibios_claim_one_bus(bridge->bus); + if (!bridge->probe_only) { + if (bridge->bus->self) + pci_assign_unassigned_bridge_resources(bridge->bus->self); else - pci_assign_unassigned_bus_resources(bus); + pci_assign_unassigned_bus_resources(bridge->bus); } /* Add new devices to global lists. Register in proc, sysfs. */ - pci_bus_add_devices(bus); + pci_bus_add_devices(bridge->bus); } EXPORT_SYMBOL_GPL(pcibios_finish_adding_to_bus); @@ -1714,7 +1717,7 @@ void pci_scan_host_bridge(struct pci_host_bridge *bridge) ppc_md.pcibios_fixup_phb(hose); /* Configure PCI Express settings */ - if (bridge->bus && !pci_has_flag(PCI_PROBE_ONLY)) { + if (bridge->bus && !bridge->probe_only) { struct pci_bus *child; list_for_each_entry(child, &bridge->bus->children, node) pcie_bus_configure_settings(child); diff --git a/arch/powerpc/kernel/pci-hotplug.c b/arch/powerpc/kernel/pci-hotplug.c index 1d7d7d2deeed5..dfe9744eb97ed 100644 --- a/arch/powerpc/kernel/pci-hotplug.c +++ b/arch/powerpc/kernel/pci-hotplug.c @@ -143,6 +143,6 @@ void pci_hp_add_devices(struct pci_bus *bus) for_each_pci_bridge(dev, bus) max = pci_scan_bridge(bus, dev, max, 1); } - pcibios_finish_adding_to_bus(bus); + pcibios_finish_adding_to_bus(phb->bridge); } EXPORT_SYMBOL_GPL(pci_hp_add_devices); diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c index 05246db597b5d..a0633c6f2e85c 100644 --- a/arch/powerpc/platforms/maple/pci.c +++ b/arch/powerpc/platforms/maple/pci.c @@ -509,6 +509,9 @@ static int __init maple_add_bridge(struct device_node *dev) hose->last_busno = bus_range ? bus_range[1] : 0xff; hose->controller_ops = maple_pci_controller_ops; + /* Tell pci.c to not change any resource allocations. */ + bridge->probe_only = true; + disp_name = NULL; if (of_device_is_compatible(dev, "u3-agp")) { setup_u3_agp(hose); @@ -624,9 +627,6 @@ void __init maple_pci_init(void) of_node_put(ht); ppc_md.pcibios_root_bridge_prepare = maple_pci_root_bridge_prepare; - - /* Tell pci.c to not change any resource allocations. */ - pci_add_flags(PCI_PROBE_ONLY); } int maple_pci_get_legacy_ide_irq(struct pci_dev *pdev, int channel) diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c index a2fdb234134fb..63551bf6c970c 100644 --- a/arch/powerpc/platforms/pseries/pci_dlpar.c +++ b/arch/powerpc/platforms/pseries/pci_dlpar.c @@ -42,7 +42,7 @@ struct pci_controller *init_phb_dynamic(struct device_node *dn) pseries_eeh_init_edev_recursive(PCI_DN(dn)); pcibios_scan_host_bridge(bridge); - pcibios_finish_adding_to_bus(bridge->bus); + pcibios_finish_adding_to_bus(bridge); return phb; } diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 262e233c1160e..d9deb82f4f408 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c @@ -484,15 +484,15 @@ static void __init pSeries_discover_phbs(void) /* create pci_dn's for DT nodes under this PHB */ pci_devs_phb_init_dynamic(phb); + + /* + * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties + * in chosen. + */ + of_pci_check_probe_only(pbh->bridge); } of_node_put(root); - - /* - * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties - * in chosen. - */ - of_pci_check_probe_only(); } static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c index bc14255d27966..a35c588439d85 100644 --- a/arch/sparc/kernel/pcic.c +++ b/arch/sparc/kernel/pcic.c @@ -402,7 +402,7 @@ static int __init pcic_pbm_scan_bus(struct linux_pcic *pcic) bridge->sysdata = pbm; bridge->busnr = pbm->pci_first_busno; bridge->ops = &pcic_ops; - pci_set_flags(PCI_PROBE_ONLY); + bridge->probe_only = true; ret = pci_host_probe(bridge); diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/controller/pci-host-common.c index 6ab694f8d2836..ad9c4f62f9e22 100644 --- a/drivers/pci/controller/pci-host-common.c +++ b/drivers/pci/controller/pci-host-common.c @@ -66,7 +66,7 @@ int pci_host_common_probe(struct platform_device *pdev) platform_set_drvdata(pdev, bridge); - of_pci_check_probe_only(); + of_pci_check_probe_only(bridge); /* Parse and map our Configuration Space windows */ cfg = gen_pci_init(dev, bridge, ops); @@ -74,7 +74,7 @@ int pci_host_common_probe(struct platform_device *pdev) return PTR_ERR(cfg); /* Do not reassign resources if probe only */ - if (!pci_has_flag(PCI_PROBE_ONLY)) + if (!bridge->probe_only) pci_add_flags(PCI_REASSIGN_ALL_BUS); bridge->sysdata = cfg; diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index ed13e81cd691d..1b55aeee628de 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -1035,7 +1035,7 @@ static int mvebu_pci_host_probe(struct pci_host_bridge *bridge) * ioport_resource trees in either pci_bus_claim_resources() * or pci_bus_assign_resources(). */ - if (pci_has_flag(PCI_PROBE_ONLY)) { + if (bridge->probe_only) { pci_bus_claim_resources(bus); } else { pci_bus_size_bridges(bus); diff --git a/drivers/pci/hotplug/rpadlpar_core.c b/drivers/pci/hotplug/rpadlpar_core.c index fee51078c0679..d502f9005bb9c 100644 --- a/drivers/pci/hotplug/rpadlpar_core.c +++ b/drivers/pci/hotplug/rpadlpar_core.c @@ -162,7 +162,7 @@ static void dlpar_pci_add_bus(struct device_node *dn) * bus of the EADS bridge so the bridge device itself gets * properly added */ - pcibios_finish_adding_to_bus(bridge->bus); + pcibios_finish_adding_to_bus(bridge); } static int dlpar_add_pci_slot(char *drc_name, struct device_node *dn) diff --git a/drivers/pci/of.c b/drivers/pci/of.c index 5ea472ae22acf..0b1603b81b0e6 100644 --- a/drivers/pci/of.c +++ b/drivers/pci/of.c @@ -215,7 +215,7 @@ EXPORT_SYMBOL_GPL(of_get_pci_domain_nr); * of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only * is present and valid */ -void of_pci_check_probe_only(void) +void of_pci_check_probe_only(struct pci_host_bridge *bridge) { u32 val; int ret; @@ -227,11 +227,7 @@ void of_pci_check_probe_only(void) return; } - if (val) - pci_add_flags(PCI_PROBE_ONLY); - else - pci_clear_flags(PCI_PROBE_ONLY); - + bridge->probe_only = !!val; pr_info("PROBE_ONLY %sabled\n", val ? "en" : "dis"); } EXPORT_SYMBOL_GPL(of_pci_check_probe_only); diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 16a17215f633d..ea281fd4a5153 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -6213,13 +6213,15 @@ static DEFINE_SPINLOCK(resource_alignment_lock); /** * pci_specified_resource_alignment - get resource alignment specified by user. + * @bridge: host bridge the device is on * @dev: the PCI device to get * @resize: whether or not to change resources' size when reassigning alignment * * RETURNS: Resource alignment if it is specified. * Zero if it is not specified. */ -static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev, +static resource_size_t pci_specified_resource_alignment(struct pci_host_bridge *bridge, + struct pci_dev *dev, bool *resize) { int align_order, count; @@ -6231,9 +6233,9 @@ static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev, p = resource_alignment_param; if (!p || !*p) goto out; - if (pci_has_flag(PCI_PROBE_ONLY)) { + if (bridge->probe_only) { align = 0; - pr_info_once("PCI: Ignoring requested alignments (PCI_PROBE_ONLY)\n"); + pr_info_once("PCI: Ignoring requested alignments (probe_only)\n"); goto out; } @@ -6342,7 +6344,8 @@ static void pci_request_resource_alignment(struct pci_dev *dev, int bar, * Later on, the kernel will assign page-aligned memory resource back * to the device. */ -void pci_reassigndev_resource_alignment(struct pci_dev *dev) +void pci_reassigndev_resource_alignment(struct pci_host_bridge *bridge, + struct pci_dev *dev) { int i; struct resource *r; @@ -6360,7 +6363,7 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev) return; /* check if specified PCI is target device to reassign */ - align = pci_specified_resource_alignment(dev, &resize); + align = pci_specified_resource_alignment(bridge, dev, &resize); if (!align) return; diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index ef7c4661314fa..0a2b6d993fe14 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -268,7 +268,8 @@ void __pci_bus_assign_resources(const struct pci_bus *bus, struct list_head *fail_head); bool pci_bus_clip_resource(struct pci_dev *dev, int idx); -void pci_reassigndev_resource_alignment(struct pci_dev *dev); +void pci_reassigndev_resource_alignment(struct pci_host_bridge *bridge, + struct pci_dev *dev); void pci_disable_bridge_window(struct pci_dev *dev); struct pci_bus *pci_bus_get(struct pci_bus *bus); void pci_bus_put(struct pci_bus *bus); diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 33bb277dbb1f4..52bb08cbeb8df 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2452,6 +2452,7 @@ static void pci_set_msi_domain(struct pci_dev *dev) void pci_device_add(struct pci_dev *dev, struct pci_bus *bus) { + struct pci_host_bridge *bridge; int ret; pci_configure_device(dev); @@ -2470,7 +2471,8 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus) /* Fix up broken headers */ pci_fixup_device(pci_fixup_header, dev); - pci_reassigndev_resource_alignment(dev); + bridge = pci_find_host_bridge(bus); + pci_reassigndev_resource_alignment(bridge, dev); dev->state_saved = false; @@ -2974,7 +2976,7 @@ int pci_host_probe(struct pci_host_bridge *bridge) * ioport_resource trees in either pci_bus_claim_resources() * or pci_bus_assign_resources(). */ - if (pci_has_flag(PCI_PROBE_ONLY)) { + if (bridge->probe_only) { pci_bus_claim_resources(bus); } else { pci_bus_size_bridges(bus); diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h index 29658c0ee71ff..8ede6d25bbb39 100644 --- a/include/linux/of_pci.h +++ b/include/linux/of_pci.h @@ -7,12 +7,13 @@ struct pci_dev; struct device_node; +struct pci_host_bridge; #if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_PCI) struct device_node *of_pci_find_child_device(struct device_node *parent, unsigned int devfn); int of_pci_get_devfn(struct device_node *np); -void of_pci_check_probe_only(void); +void of_pci_check_probe_only(struct pci_host_bridge *bridge); #else static inline struct device_node *of_pci_find_child_device(struct device_node *parent, unsigned int devfn) @@ -25,7 +26,7 @@ static inline int of_pci_get_devfn(struct device_node *np) return -EINVAL; } -static inline void of_pci_check_probe_only(void) { } +static inline void of_pci_check_probe_only(struct pci_host_bridge *bridge) { } #endif #if IS_ENABLED(CONFIG_OF_IRQ) diff --git a/include/linux/pci.h b/include/linux/pci.h index b677e686a3535..3124d572fd2b0 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -541,6 +541,7 @@ struct pci_host_bridge { void (*release_fn)(struct pci_host_bridge *); void *release_data; struct msi_controller *msi; + unsigned int probe_only:1; /* use BIOS assigned resources */ unsigned int ignore_reset_delay:1; /* For entire hierarchy */ unsigned int no_ext_tags:1; /* No Extended Tags */ unsigned int native_aer:1; /* OS may use PCIe AER */ |
